For an SPI CS pin it has to be dedicated output. My understanding is that GPIO 9 & 10 are also data pins for the flash memory, which is active all the time. I tried to use 10 awhile ago and ran into trouble. Don’t know if there’s a GPIO capability for the ADC pin.
I had worked out a scheme to be able to address an unlimited number of SPI devices virtually using the SPI GPIO expansion chip and some binary decoders. Basically you use one GPIO to CS the expansion chip, and using outputs from that (16 pin) chip, set the state of the decoder to direct two other ESP pins to specific SPI slaves. It’s just a handful of chips and would allow the high speed chip select needed for IotaWatt sample rates of more than 14 channels.
I stopped thinking about it back when things were moving more toward the ESP32. I might possibly build a prototype board with the hardware to do it as a proof of concept. It’s less than half a dozen relatively inexpensive chips and I think there’s room.