SAMD21 ADC and emonLibCM

@TrystanLea
I’m trying to make progress with the -DB48, and I don’t want to split my time between two processors. At the moment, I have a sampling interval of ~78 µs, which I think is viable - there are no displaced interrupts to be seen. Until I get all the logic and maths proven, I can’t really make a sensible prediction.

We know that reverting to the way that emonLibCM works with the '328P will allow more channels/better sample rate, but it retains the high/low current inaccuracies introduced by the value-dependent phase errors of the transformers, which is now the main source of inaccuracy.

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