Hi Robert, is there anything I can do to help with emonTx V4 or is it all hardware related ?
Best regards,
Oz
@ozpos - Iāve sent you a message re. a library implementation for SAMD - hopefully we can do something with it!
Sorry, I forgot I hadnāt replied. Iām afraid I donāt think there are any ways that I can hand out stand-alone parts for you to work on in isolation. However, thank you for offering to help.
Iām working on emonLib at present - thatās where all the problems lie. The major cause of inaccuracy in the present emonLibCM is the change in phase error of the c.t. with current - it is this that means itās impossible to calibrate accurately at both high and low currents. My ambition is to correct for the phase error dynamically. This obviously increases to complexity compared to the present emonLibCM.
The difficulty is, with the AVR-DB version, the enhanced sample rate combined with the number of channels means itās not possible to carry out the mathematical operations necessary to prepare to calculate the rms values, and particularly real power, in the time available while the ADC converts the next sample.
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Iāve ordered a couple of Adafruit Feather M0 to explore when I get time, might be useful further down the road @Robert.Wall if we need more processing speed.
An alternative might be the Arduino Nano 33IoT which has a SAMD21, WiFi, Bluetooth and eight analogue inputs (12 bit 350ksps ADC). Sounds good! I donāt know how available it is though.
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Looks great!
Hi @awjlogan, sorry for the delay, my time on this has been consumed by other things also.
I only slightly massaged the AdaIno lib. so that an instance could have multiple channels each with a buffer. This fitted well with the emonLib library but my aim was for a CM design.
My working code for EmonLibCM does not use the adaino library, instead I simply #ifdef in and out access to the adc registers so as not to disturb the library as a whole.
This approach is quick and low risk and possibly more useful to others but it does not utilise much of the hardware potential offered by the Cortex M0.
Sorry I cannot offer any support for your remaining boards, I just compared ardino code with the data-sheet and went from there.
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Hi @Robert.Wall no probs.
I havenāt done this kind of stuff for years and I certainly do not wish to come across as teaching an expert how to suck eggs. Many moons ago I worked with an 8-bit micro (with 8-bit adc) and dither to measure domestic power with an accuracy of 20-bit in the prototype (noisy er the better). The sampling was controlled via NMI and generated by on chip timer that avoided dither aliasing to more than 200 decimal places.
No floating point here either. I achieved timing closure on the maths by writing in assembler the long x long multiply call so that it only returned a long result (the instantaneous power would never overflow a long anyway) this freed up 50% cpu bandwidth. I cannot remember what the H8 clock/adc conversion time was so 48MHz must be oodles of time with integer math. Decimation filters were done in software.
What is the minimum sampling rate for the harmonic resolution you are aiming for ?
The sampling rate could be set by a timer and scan mode used for software free channel muxing (although I have not got scan mode to work yet).
Iām no software expert, Iām an electrical engineer whoās specialised in the electronics side, principally in drives & controls. That said, I have been fairly deeply involved with software for a good many years - though the only formal training - aside from Algol at Uni - was a brief course in Fortran 4. Thereās no danger of teaching me to suck eggs - more like me learningā¦
Sampling rate? - as high as is feasible. The starting point is the rules for harmonics injected into the supply. Itās nice to be able to measure as much of that as possible, though the amount allowed (and bear in mind we must assume our loads are compliant - weāre not testing for compliance) falls rapidly with frequency, which works in our favour.
https://www.nutwooduk.co.uk/archive/old_archive/990619.html
(I think this is still valid.)
Also:
Sadly, much as I would like, I still canāt afford any time to devote to this.
Hi Robert thanks for your response I understand you do not have the time to spare but it would be useful to me as a starting point to know what minimum theoretical sampling rate would be acceptable w.r.t. harmonic resolution and accuracy or should it just be as good as what RECS stick on peoples walls ?
i.e. what MID class (A,B,C) and to what harmonic ?
many thanks and best regards,
oz
Ideally, yes. But reality means youāre unlikely to achieve that. Iām hoping the 13th harmonic (of 50 Hz) will be achievable (i.e. > 26 samples per cycle); with 12 power channels and the -DB48 processor, even that might be out of reach.
I make that 0.02Ć·(27Ć13) = 56.98us.
There is a calculator here Getting the most out of the SAM D21's ADC - Stargirl (Thea) Flowers and if I enter values for max ADC clock and a sample time of 57us it shows:
Actual sample time of 0.33us
Propagation delay 5.33us
and Conversion time 14us
This leaves 19.66us free time between readings and is equivalent to 912 single cycle instructions (most instructions are single cycle even 32x32bit multiply) or 70 instructions / channel.
Will the calcs fit into that ?
3 V + 12 I = 15 according to my maths - if you have the equivalent of the emonTx V3 & emonVs,
otherwise itās to suit your hardware (or maybe vice versa).
This depends on your processor, and what you do with the maths. You might spot some economies that Iāve missedā¦
With a 48MHz CPU and 27 x 13 samples in 20ms the required sampling frequency 17.55kHz or one sample every 56.98us. After ADC overheads and actual sampling time one is left with 17.32us or 831 ops (63.95 ops / channel).
Unfortunately I do not have the CM energy calcs in my head right now so I have no feeling if 63 ops would be enough ?
There are real economies to be gained however by running the ADC in scan mode and using DMA.
I am a bit pressed at the moment as there is a mountain of rigid insulation arriving tomo.
Thanks @ozpos @Robert.Wall it would be great to get an idea for how much processor time the SAMD21 might free up vs the AVR-DB, perhaps it will be very useful for getting higher performance at 12 channels. Iāve now got a couple of the Arduino Nano 33 and Feather M0 development boards, I wont get a chance to explore them for a bit, but interested following along.
@TrystanLea
Iām trying to make progress with the -DB48, and I donāt want to split my time between two processors. At the moment, I have a sampling interval of ~78 Āµs, which I think is viable - there are no displaced interrupts to be seen. Until I get all the logic and maths proven, I canāt really make a sensible prediction.
We know that reverting to the way that emonLibCM works with the '328P will allow more channels/better sample rate, but it retains the high/low current inaccuracies introduced by the value-dependent phase errors of the transformers, which is now the main source of inaccuracy.
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Can this be compensated for in a simple way or via a lookup table ?
Thanks Robert, yes understood
I donāt think so - the real power calculation is affected, but the effect of the error also heavily depends on the load power factor.
Is the maths in question mostly integer or floating point? And if integer, how many bits wide?