That all sounds good.
The distortion won’t typically introduce an offset. Those SMPSs work on a half-cycle basis and are agnostic to whether the half-cycle is positive or negative. So in steady state conditions the negative half-cycle is a mirror image of the positive half-cycle. You can see some examples in this post and the one immediately following it. That third one has the raw data attached if you want to play with it in a spreadsheet.
In the case where the load being supplied by the SMPS is very variable then you have the situation where no two half-cycles are the same. You can somewhat see that in the first trace of those three: the second positive peak is bigger than all the rest. You might be tempted to say “ah huh… that signal has a positive bias and is introducing a DC offset” but I’m sure if I panned out we’d see just as many on the negative side.
But, even if there was something in the power supply design that only happened every other half cycle and so introduced a bias, you’re then back to (or at least approaching) a classic half-wave rectified load. A cheap hair-dryer on low setting is a good example of that. That DC offset can’t get through the CT. So while the signal might not be balanced around 0 on the primary side of the CT it will be on the secondary side. As @Robert.Wall says above, that DC offset is permanently lost to anything on the secondary side of the CT (like your ADC) and there is no way of recreating it in order to measure it. It’s an easy experiment to try for yourself if you have a hair-dryer, a CT and a scope.
Here’s one I prepared earlier.